// creative nanodevices — Barcelona · Shenzhen

Sensors within the chip itself.

Nanusens builds NEMS sensor structures directly inside standard CMOS layers. No separate MEMS die, no special process: 10× smaller sensors that scale in any CMOS fab on the planet.

0×smaller than discrete MEMS
0×area reduction on die
0extra process steps: pure CMOS
0+patents granted worldwide

// how it works

The sensor is
the silicon.

Using the metal and via layers of any standard CMOS process, we etch nano-scale moving structures inside the interconnect stack — accelerometers, pressure and sound sensors that live in the same die as your ASIC logic.

  • mask_layers — standard CMOS, no post-processing fab
  • vHF_release — one final etch step frees the nanostructures
  • sensors_as_IP — drop our blocks into your ASIC design

// product lines

Three ways to ship
smaller silicon.

01

Motion & presence

NEMS accelerometers for TWS earbuds, wearables and AIoT — always-on tap and presence detection at a fraction of the power budget.

statussampling
02

6G tunable RF

Digitally tunable capacitors (DTC) built in CMOS for adaptive 6G antennas: higher Q, smaller footprint, no exotic processes.

statusin design-in
03

Sensors as IP

License our sensor blocks and integrate them straight into your ASIC. One die, one supply chain, one BOM line less.

statuslicensing now

Every sensor that moves into the CMOS die frees a millimetre that products have been fighting for since 2007.

// discrete MEMS vs NEMS-in-CMOS

The math is
not subtle.

Discrete MEMS

  • Separate MEMS die + ASIC die
  • ~4 mm³ package volume
  • Specialised MEMS fabs, long lead times
  • Two supply chains to qualify

NEMS-in-CMOS

  • Sensor lives inside the ASIC die
  • ~1 mm³ — 10× smaller product impact
  • Any standard CMOS fab, standard yield
  • One die, one BOM line, one vendor

// next step

Put a sensor inside
your next ASIC.

NDA-friendly · evaluation kits for qualified programs · Barcelona & Shenzhen